Mahesh Tirupattur, Executive Vice President of Analog Bits, led the panel “Who Wins in the IP Ecosystem?” during the Semico Impact 2012. Other members of the panel were Suk Lee of TSMC, Jean-Marie Brunet of Mentor Graphics, Tony Stelliga of Intersil, and Dr. Naveed Sherwani of Open-Silicon.
Mr. Tirupattur began the panel by describing today’s industry as a collaborative model, where customers tell the IP companies what they want, and what they can do better. What the industry needs is a dynamic ecosystem that improves efficiency, with no waste or redundancy. It’s not just who wins in the ecosystem, but how do we get paid for the value we bring to the table?
The panel was asked to address whether consolidation in the semiconductor industry is a good thing or does it hinder innovation? Dr. Sherwani asserted that for basic functions, standardization is necessary, but if it reaches the top it kills innovation. For the IP business, standardization of all IP would be bad. He hopes that investment continues to support small IP companies that bring vibrant, customized IP to the marketplace. He worries that if the industry consolidates into a few large companies, the quality of innovation will fall and the value of the corresponding hardware and software will fall.
The panel then discussed what IP blocks are critical to design efforts. Tony Stelliga said that high performance I/O cells with low impedance are critical. There is also a high need for advancements in memory in order to intepret commands on the fly. There could be I/O cache and instruction cache and fast links with frequency planning.
The panel and audience members discussed who drives the IP ecosystem. Although fabless companies take the risks, the economic center lies with the system companies.
Another interesting point that was made was that companies in the industry need to do a better job of time-to-market by being ready to go as soon as a consortium casts a standard in stone. The companies that can do this today are the biggest winners. Members of the IP community need to particpate in the standards forums so they can be ready to jump into a market as soon as a standard is ready.
Jean-Marie Brunet said that collaboration needs to occur between the process and the foundry teams. He said that, while there is no lack of innovation, the ecosystem is really important at the advanced nodes, and that IP design cannot occur without collaboration. Suk Lee went on to say that the foundries’ role in the ecosystem is really to help foster a strong and diverse ecosystem. It is very difficult for small IP players to enter the market, even though they are responsible for a lot of the innovation.
An audience member asked if we will see power management embedded in processor cores as opposed to existing only as discrete chips. Mr. Stelliga said that integration of power management is very challenging, so they are still doing discrete chips. There is a move to have very sophisticated BCD processes for power managment, but the chips are so small already, that it doesn’t really make sense to try to inegrate them at this time.
The panel ended with a discussion of 2.5D and 3D technologies. They will be applied in parallel. 3D will become reality in 2 to 3 years. The panel members think that 3D memory has lots of potential for the semiconductor industry.
Director of Manufacturing Research